Schottky power diode comprising a sicoi substrate and the method of producing one such diode

ABSTRACT

The present invention relates to a power junction device including a substrate of the SiCOI type with a layer of silicon carbide ( 16 ) insulated from a solid carrier ( 12 ) by a buried layer of insulant ( 14 ), and including at least one Schottky contact between a first metal layer ( 40 ) and the surface layer of silicon carbide ( 16 ), the first metal layer ( 30 ) constituting an anode.

TECHNICAL FIELD

The present invention relates to a power junction device and a processfor making such a device.

By power junction is understood a junction susceptible of being passedthrough by a high current of the order of one ampere or several amperes,and susceptible of being subjected to an inverse voltage of severalhundred volts. The invention is aimed more particularly at making diodesthat are susceptible of operation at a voltage in a range from 200 to1500 volts.

The invention finds applications in the fields of power electronics andparticularly in integrated power electronics.

PRIOR ART

At the present time, a number of power electronics devices operating ina voltage range from 200 to 1500 volts use bipolar silicon diodes. Yet amajor drawback of silicon diodes is that they present substantialswitching losses. These losses are due to the operational physics ofthese bipolar diodes which is based on the use of minority carriers.

In similar applications, silicon carbide (SiC) allows Schottky typediodes to be made. These diodes have static performances comparable tothose manufactured from silicon. Moreover, silicon carbide basedSchottky diodes do not suffer from switching losses. This advantagestems from the absence of minority carriers. Thus we find siliconcarbide diodes with operating voltages of the order of 300 to 1500volts.

The use of silicon carbide and the development of diodes based on thismaterial are however still held back by the excessive cost of thesilicon carbide. It is estimated that the cost of a silicon carbidesubstrate may represent up to half the cost of a component made on thissubstrate.

Furthermore, silicon carbide substrates are usually only available inthe form of wafers with a limited diameter. The diameter is generally 2or 3 inches (about 5.1 or 7.6 cm). The small diameter of silicon carbidesubstrates makes them incompatible with the equipment and productionlines specific to silicon technology. Silicon wafers are indeedavailable with larger diameters. Thus, the need to resort to specialequipment further increases the price of silicon carbide-basedcomponents.

As far as system integration is concerned, the prior art is furtherillustrated by documents (1) and (2). These illustrate the manufactureof switching systems on substrates that are of the SOI type but which donot meet the integration and power criteria accepted for theapplications targeted by the invention.

DISCLOSURE OF THE INVENTION

One purpose of the invention is to propose a power junction device, anda process for manufacturing it, which do not present the limitationsmentioned above in relation to the description of the prior art.

A particular purpose is to propose a device of this kind that issusceptible of manufacture on conventional production lines adapted tosilicon substrate processing.

Yet another purpose is to propose a device and process that areinexpensive.

A final purpose is to propose a reliable device capable of operatingwith inverse withstand voltages in a range from 200 to 1500 volts and aforward current of 1 to 10 A.

To fulfil these purposes, the invention relates more precisely to apower junction device that includes a SiCOI substrate with a layer ofsilicon carbide insulated from a solid support by a buried layer ofinsulant, and including at least one Schottky contact between a firstmetal layer and the silicon carbide surface layer, the first metal layerconstituting an anode.

In terms of the invention, by power junction device is understood adevice which comprises a junction susceptible of being used as a powerdiode. The device is not however restricted necessarily to a diode. Itmay also comprise one or more switches and possibly associated controlmeans integrated on the same substrate.

By means of the invention and particularly by using a SiCOI substratethe cost of manufacturing a power junction device may be substantiallyreduced. One reason for this is that the SiCOI substrate is lessexpensive than a solid silicon carbide substrate. Moreover, SiCOIsubstrates are available with diameters that are compatible with thetools specific to silicon wafer processing.

According to one particular aspect of the invention, the device may beconfigured in such a way that the metal layer forming the Schottkyjunction is in contact with one flank of the layer of silicon carbide,the flank forming an external angle relative to a main surface of thislayer.

The angle formed by the flank of the layer of silicon carbide allows thecontact between the first metal layer and the semiconductor SiC layer tobe optimised. This angle also has an influence over the inversewithstand voltage. Furthermore, electrical conduction in the layer ofsilicon carbide, parallel to this layer, makes it possible to reduceconsiderably the risk of weaknesses due to crystalline defects. Theseweaknesses such as micro-cavities in fact mainly affect conductiontransverse to the layers.

In a particular embodiment, the angle, measured relative to a mainsurface of the layer of silicon carbide, in contact with the buriedlayer of insulant, may have a value between 20° and 80°, preferablyclose to 45°.

According to another particular aspect of the invention, the device maycomprise a surface layer of insulant coating the layer of siliconcarbide. In this case, the first metal layer, forming an anode, extendsat least partly over one flank of the surface layer of insulantadjoining the flank of the layer of silicon carbide. The insulatinglayer, in adjoining the flank of the layer of silicon carbide, may toadvantage be turned to good account in order to constitute protection byfield reduction around the Schottky contact. It can to this end alsohave a slope adjusted so as to adjoin the slope formed by the flank ofthe layer of silicon carbide, or identical to it.

This characteristic allows the withstand voltage of the device to beincreased.

As mentioned above, the device can comprise a plurality of diodes or acombination of diodes and other components. In particular, the devicemay comprise at least one power diode and at least one transistor, thetransistor having a channel formed in the layer of silicon carbide.

According to one particularity of the device, the anode forming metallayer, in other words the metal layer in Schottky contact with the layerof silicon carbide may extend as far as a solid part of the substrate,in silicon. The solid part of the substrate may thus be used to providea “rear” contact point for the anode. Indeed, one surface of thesubstrate, opposite the surface carrying the layer of silicon carbide,may be metallized in order to form an anode contact point and so make iteasier to package the device.

Connecting the junction anode to the substrate additionally allows itsinverse withstand voltage to be increased.

According to one particularity of the invention, the device may have afirst anode metal layer and additionally a second cathode metal layer,in ohmic contact with the layer of silicon carbide. The first and secondmetal layers may have comb-forming parts respectively, the comb-formingparts of the first and second metal layers being interdigitated.

The configuration of a part of the metal layers in the form ofinterdigitated combs allows higher strength forward currents to beobtained.

The invention also relates to a process for manufacturing a junctiondevice on a SiCOI substrate as described. The process includes thefollowing steps:

-   -   a) the formation of an ohmic contact point on one surface of the        layer of silicon carbide, opposite the buried layer of insulant,    -   b) localised etching of the layer of silicon carbide outside an        area including the ohmic contact so as to release at least one        lateral flank on the layer of silicon carbide, and    -   c) the formation of a Schottky contact on the lateral flank.

The order of steps a) and b) may possibly be reversed.

The localised etching carried out at step b) of the process ispreferably an etching that uses a lithographic mask and a lithographicagent with restricted selectivity relative to the lithographic mask, soas to give the lateral flank a slope.

Other characteristics and advantages of the invention will emerge fromthe following description, with reference to the appended drawings inthe figures. This description is given purely by way of illustration andnon-restrictively.

BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a partial diagrammatic cross-section of a SiCOI substrate thatcan be used to make a device in accordance with the invention.

FIGS. 2, 3 and 4 are partial diagrammatic cross-sections of thesubstrate in FIG. 1, showing stages in the manufacture of a cathode in adevice in accordance with the invention.

FIGS. 5 to 7 are partial diagrammatic cross-sections of the device inFIG. 4, showing stages in the manufacture of an anode in a device inaccordance with the invention.

FIG. 8 is a partial diagrammatic cross-section of the device in FIG. 7and shows a conditioning stage.

FIGS. 9 to 11 are partial diagrammatic cross-sections of the device inFIG. 4, showing stages in the manufacture of an anode in a device inaccordance with the invention, according to a variant of the processshown in FIGS. 5 to 8.

FIG. 12 is a view of a main surface of a device in accordance with theinvention.

FIGS. 13 and 14 are partial diagrammatic cross-sections of a device inaccordance with the invention and show different aspects of theembodiment of such a device.

DETAILED DESCRIPTION OF MODES OF IMPLEMENTATION OF THE INVENTION

In the following description, identical, similar or equivalent parts ofthe different figures are identified by the same reference signs to makeit easier to cross-refer between the figures. Furthermore, and in theinterests of clarifying the diagrams, all elements are not shown to auniform scale. Finally, the description indicates a certain number ofvalues in figures or of parameters. These values or parameters are notindispensable to the implementation of the invention but simply indicateconditions that are particularly favourable for its implementation.

FIG. 1 shows a SiCOI (silicon carbide on insulant) substrate 10. Such asubstrate may be made in particular by implementing a known cleavingtechnique with the designation “Smart Cut”. It includes, in the exampleshown, a thick layer 12 of silicon constituting a mechanical carrier.This layer is coated in order by a buried insulating layer 14 of siliconoxide and by a surface layer 16 of single-crystal silicon carbide. Thesilicon may be replaced by another material, as can the insulatinglayer. The latter can be Si₃N₄ for example.

In the particular example described here, the layer 12 of silicon has athickness between 100 and 500 μm and is doped with N type impurities.The doping is selected to be sufficient to allow current to pass,particularly when it is planned to use the substrate as a rear contactpoint. This aspect is further described below.

The function of the buried layer of silicon oxide is one of electricalinsulation between the different active parts of the device. Itsthickness is adjusted as a function of the inverse withstand voltagerequirements. Its thickness is, for example between 1 μm and 5 μm, giventhat a thickness of 1 μm makes it possible to withstand a voltage ofabout 200 volts.

The surface layer of single-crystal SiC is between 0.1 and 3 μm thick.It is doped P-type or N-type with a concentration of impurities of theorder of 10¹⁵ to 5.10¹⁷ cm⁻³.

A first stage in the manufacture of an ohmic contact is shown in FIG. 2.It includes the formation of a doped zone 20 in the layer of siliconcarbide. The doped zone is of the same type of conductivity as the layer16 of silicon carbide but has a stronger concentration of impurities. Anitrogen implantation, for example, is used, leading to an N+ typedoping, and allowing a good ohmic contact to be formed with asubsequently deposited metal. The lateral extension of the doped zone isfixed by a silicon oxide implantation mask 22, shaped according to theusual techniques of photolithography. The extension in depth of thedoped zone is of the order of 100 to 200 nm. It is fixed by theimplantation energy.

After an implantation anneal, intended to activate the doping species,the implantation mask 22 is removed.

A following stage, shown in FIG. 2 includes the deposition on thesurface of the layer 16 of silicon carbide of a layer 24 of insulant ina dielectric material such as silicon oxide or nitride. The depositionof this layer preferentially takes place at high temperature so as togive it good dielectric quality. It may, for example, be a 3 μm thicklayer of silicon oxide obtained by chemical vapour deposition (CVD).

The layer 24 of insulant is shaped by etching so as to provide anopening 26 therein, and to expose a part of the doped zone 20 of thelayer of silicon carbide. The lithographic agent is preferentially afluorinated plasma of CH₃ or SF₅ so as to control with precision thedimensions of the opening. Furthermore these are set by a mask, shown inoutline by a dot and dash line.

It may be seen in the figure that the opening 26 has an area below thatof the doped zone and coincides with a central part of this zone. Thisallows a marginal part of the doped zone to be provided, coated by thelayer 24 of insulant. The marginal part, with its extension denoted d,sets a distance between a metal layer of a cathode terminal, describedbelow, and the edge of the doped zone. This measure makes it possible toreduce a cathode electric field and thus to increase the withstandvoltage of the device.

The formation of the cathode terminal is shown in FIG. 4. A layer 30 ofmetal, such as W, Ni, Ti, is deposited on the substrate in such a way asto come into contact with the doped zone 20 and to form therewith anohmic contact. In the example described, a layer of tungsten of athickness of 50 to 500 nm is deposited by cathode sputtering. It is thenetched by wet process or plasma, in accordance with a mask, not shown,in such a way as to set the shape of the cathode terminal. Heattreatment, at a temperature of the order of 900 to 1300° C. depending onthe materials, is applied for two minutes so as to anneal the ohmiccontact. This operation is performed after the removal of the mask.

The following description relates to the formation of an anode terminal.A first stage in this operation, shown in FIG. 5, includes etching onthe layer 24 of insulant so as to expose a new part of the layer 16 ofsilicon carbide. During this etching, a part of the layer 24 of insulantremains protected by a mask shown in a broken line. The etchingparameters, and in particular the etching selectivity, are preferablyadjusted so as to give the layer 24 of insulant an etching flank 34which has a slope at an angle α of 20° to 80° relative to the plane of amain surface of the layer.

The lithographic mask is then removed.

After etching the layer 24 of insulant, the underlying layer of siliconcarbide may also be subject to etching. This etching, shown in FIG. 6,is applied by using the residue of the layer of insulant as alithographic mask.

The etching parameters are again adjusted so as to control theselectivity relative to the layer 24 of insulant and thus to release alateral flank 36 of the layer 16 of silicon carbide which also forms anangle relative to the main surfaces. This angle, denoted β, preferablyhas a value between 20° and 80°, for example 45°. Etching is carried outusing a fluorinated plasma, such as SF₆ to which more or less oxygen isadded to modify the selectivity relative to the layer of insulant. Moreor less pronounced selectivity allows a steeper or less steep slope tobe formed on the lateral flank 36. Etching is applied with barrier onthe buried insulant layer 14. It is considered, in the interests ofsimplification, that the angle α is not modified during this etching.

The slopes α and β given to the lateral flanks 34 and 36 of the layer 24of insulant and the layer 14 of silicon carbide, make it possible tofacilitate the formation of a metal Schottky junction on the layer ofsilicon carbide. They also dictate the space requirement and theelectrical characteristics of the device.

A gentler slope, in other words a smaller angle, allows an increase inthe surface of a junction formed on the layer 16 of silicon carbide and,consequently, in the withstand voltage of the junction. A gentle slopedoes however increase the space requirement of the component on thesurface of the substrate. Conversely, a steeper slope allows space to besaved, but at the cost of a technical difficulty.

FIG. 7 shows the formation of the Schottky junction. A junction layer40, including a metal layer, preferably titanium or nickel, is depositedon the substrate so as to coat particularly the lateral flank 36 of thelayer 16 of silicon carbide. The metal layer, of a thickness of theorder of 50 to 300 nm, is deposited by sputtering or by evaporation overthe whole of the exposed surface, then shaped by etching in accordancewith a mask that is not shown.

The junction layer may be formed of several sub-layers. In a particularexample, it may comprise in order a Ti metal layer, an intermediatelayer of TiN and a surface layer of Al. These layers are not detailed inthe figures for reasons of clarity.

The titanium metal layer forms the junction itself with the layer ofsilicon carbide. The function of the aluminium layer is to lower theresistance of the metallization and therefore to increase the admissiblein-series current density. Aluminium further makes it easier to weldexternal connecting wires, also in aluminium, when the device is putinto a housing. The layers indicated above can also, as is shown in FIG.7, coat the first metal layer 30 forming the cathode terminal. Althoughin the figure the junction layer 40 exactly coats the ohmic contactlayer 30 of the cathode terminal, it can also overflow around thecathode terminal or more simply not coat the layer 30 of the cathodeterminal.

The junction layer 40 has several parts which have different functions.A first part 41 is in contact with the layer 16 of silicon carbide. Asshown above, this part performs the Schottky junction function.

A second part 42 partially coats the surface layer 24 of insulant, andparticularly the lateral surface 34 of this layer. It has a field platefunction. In other words its purpose is to move a strong electric fieldcritical zone from the edge of the Schottky junction to a thicker partof the surface layer 24 of insulant. It will be recalled that the layer16 of silicon carbide is etched by using the surface layer 24 ofinsulant as a lithographic mask. The lateral surfaces of these layersare therefore self-aligned.

A third part of the junction layer, identified by the reference 43,rests on a part of the buried insulating layer 14, exposed duringetching of the layer 16 of silicon carbide. It will also be recalledthat this buried layer is used as an etching barrier layer. The thirdpart 43 is turned to good account to connect the component to theoutside.

When the angles α and β formed by the lateral flanks 34, 36 of thelayers 16 and 24 are not too steep, a homogeneous coating by thejunction layer 40 can be obtained.

FIG. 8 shows a final stage including the passivation of the device. Apassivation layer 50 of a material such as polyimide, or anotherinsulating material is deposited on the device so as to coat the partspreviously described. This layer of a thickness of the order of 2 to 20μm can be deposited, for example, by horizontal whirler. It allows thesurface of the component to be made plane. Shafts 52, 54 giving accessto the anode and to the cathode can be provided in this layer so as toallow a connection to the housing by aluminium wires.

In a device in accordance with FIG. 8 the anode and cathode contactpoints are on the same surface, in the event the surface carrying thepassivation layer 50. In the interests of convenience, this surface isdesignated as the “front surface”. The opposite surface, formed by thethick layer 12 of silicon is designated as the “rear surface”.

A description is given, in relation to the next figures, of a variant ofthe device with an anode contact point on the rear surface.

FIG. 9 shows an etching stage occurring between the stages shown inFIGS. 6 and 7. During this stage an opening 60 giving access to thethick layer of silicon is etched through the buried insulating layer 14.The opening obtained by wet process or plasma is localised in the partof the buried insulating layer 14 previously exposed during etching ofthe layer 16 of silicon carbide. The location of the opening is set by amask shown in outline as a dot and dash line.

FIG. 10 shows that the metal junction layer 40, formed subsequently, nowhas a part 44 which extends into the access opening 60 so as to comeinto ohmic contact with the layer 12 of silicon. It can be seen in FIGS.9 and 10 that etching has also been carried out on the buried insulatinglayer 14 so as to obtain flanks with a gentle slope. The slope is forexample between 30° and 70°. This allows good continuity of the metaljunction layer 40.

FIG. 11 shows a final stage in conditioning the component. A passivationlayout 50 coats the front surface and is provided with an access shaft52 for the cathode terminal.

It will also be noticed that on the rear surface of the component thereis a metallization layer 60 coating the layer 12 of silicon. This is forexample a triple layer including in order a layer of Ti, of Ni then ofAu. Such a structure allows an excellent contact point to be providedand facilitates the subsequent brazing of the device on the housing. Theopening 54 described with reference to FIG. 8 has become pointless. Inthe above manufacturing process, the first and second metal layers, andmore generally the ohmic contact layers and the junction layers can beshaped so as to confer particular designs on them. This can take placeduring the stages illustrated in FIGS. 4, 7 and 10 particularly.

FIG. 12 shows a particular configuration of these layers. The anodeforming junction layer 40 and the cathode forming first metal layer 30extend over an intermediate area 66 in which these layers have aninterdigitated comb structure. Such a structure allows the polarisationstate forward current to be increased.

The manufacture of diodes in accordance with the process indicatedallows insulation between the different components to be obtainedautomatically. By way of illustration, FIG. 13 shows in cross-sectiontwo diodes made on the same substrate 10. A first diode, complete, isidentified with the reference 1 a and a second diode, only half of whichis shown, is identified with the reference 1 b. To distinguish the anodeand cathode terminals of the two diodes, the references of the metallayers 30, 40, are followed by the letters a and b corresponding to thediodes 1 a and 1 b. Reference may be made to the previous description,on the subject of these layers. In an intermediate area 70 between thetwo diodes the passivation layer 50 is directly in contact with theburied insulating layer 14. This results from the etching of the layerof silicon carbide with barrier on the buried insulating layer. The area70 thus provides perfect electrical insulation between the components.Any connection between components could be obtained during the shapingof the junction layer 40 a, 40 b or of the metal contact layer 30 a, 30b. These layers are in fact etched respectively in a concomitant way forall the components made on the same substrate. One or more diodes canthus be connected in series or in parallel.

A device in accordance with the invention may comprise, apart from adiode, other components such as particularly a field effect transistor.This is shown in FIG. 14 which shows a possibility of integrating such atransistor onto the same substrate. The transistor has gate, source anddrain terminals identified by the references 80, 82, 84 respectively.The manufacture of the source and drain 82, 84 is identical to that ofthe ohmic contact terminals of the diodes. In other words the metalcontact layer 30 is in contact with doped zones 20 of the layer 16 ofsilicon carbide. Reference can thus also be made to the previousdescription. The gate is obtained by making an opening in the surfacelayer of insulant 24 then by depositing therein the contact metal layer30. The opening can be made with flared sides, particularly if theprocess used is the one described for Schottky diodes, in other words ifit is wished to obtain both MESFET transistors and Schottky diodes. Theflared sides are not however necessary for the operation of thetransistors. The gate opening made in the layer 24 of insulant isachieved by etching with barrier on the layer of silicon carbide. Thelayer portion 30 shaped to form the gate 80 thus rests on a main surfaceof the layer of silicon carbide and not on one of its lateral flanks.The gate forms a Schottky junction. The layer 16 of silicon carbide hereconstitutes the transistor channel.

Documents Cited

-   -   (1) U.S. Pat. No. 6,229,179    -   (2) U.S. Pat. No. 6,127,703

1. Power junction device including a substrate (10) of the SiCOI typewith a layer of silicon carbide (16) insulated from a solid carrier (12)by a buried layer of insulant (14), and including at least one Schottkycontact between a first metal layer (40) and the surface layer ofsilicon carbide (16), the first metal layer (40) constituting and ananode, characterized in that the first metal layer (40) is in contactwith a flank (36) of the layer of silicon carbide (16), forming an angle(β) relative to a main surface of this layer.
 2. Device according toclaim 1, wherein the angle (β), measured relative to a main surface incontact with the buried layer of insulant (14) has a value between 20°and 80°, preferably close to 45°.
 3. Device according to claim 1,including a surface layer of insulant coating the layer of siliconcarbide, and wherein the anode forming metal layer (40) extends at leastpartially over one flank (34) of a surface layer of insulant (24)coating the layer of silicon carbide (16) and adjoining the flank (36)of the layer of silicon carbide.
 4. Device according to claim 1,including a second metal layer (30) in ohmic contact with the layer ofsilicon carbide and forming a cathode.
 5. Device according to claim 1,wherein the anode forming first metal layer (40) extends as far as thesolid silicon carrier.
 6. Device according to claim 1, including atleast one power diode and at least one transistor, the transistor havinga channel formed in the layer of silicon carbide.
 7. Device according toclaim 1, including a plurality of power diodes connected in series or inparallel.
 8. Device according to claim 4, wherein the first and secondmetal layers have comb-forming parts respectively, the comb-formingparts of the first and second metal layers being interdigitated. 9.Process for manufacturing a power diode on a SiCOI substrate with alayer of silicon carbide (16) insulated from a solid silicon carrier(12) by a buried layer of insulant (14), the process including thefollowing stages: a) the formation of an ohmic contact point on onesurface of the layer of silicon carbide, opposite the buried layer ofinsulant, b) the localised engraving of the layer of silicon carbideoutside an area of the ohmic contact so as to release at least onelateral flank (36) on the layer of silicon carbide (16), and c) theformation of a Schottky contact on the lateral flank.
 10. Processaccording to claim 9, wherein the localised etching is etching using alithographic mask and a lithographic agent with restricted selectivityrelative to the lithographic mask, so as to confer a slope on thelateral flank.
 11. Process according to claim 9, wherein stage a)includes the formation on the layer of silicon carbide of a surfacelayer of insulant (24).
 12. Process according to claim 9, wherein thesurface layer of insulant (24) is used as a lithographic mask duringstage b.
 13. Process according to claim 9, wherein the Schottky contactis formed between a metal layer (40) and the layer of silicon carbide(16), the metal layer (40) being extended partly over the surface layerof insulant (24).
 14. Process according to claim 9, wherein the Schottkycontact is formed between a metal layer (40) and the layer of siliconcarbide (16), the metal layer (40) being extended as far as the solidcarrier (12), through an opening previously provided in the buried layerof insulant (14).
 15. Process according to claim 9, wherein the stage offorming an ohmic contact point includes the formation of a doped zone(20) in the layer of silicon carbide, then the deposition of a layer ofmetal (30) in contact with a central part of the doped zone, byproviding a shift (d) between the layer of metal (30) and the peripheryof the doped zone.